System and method for maintaining synchronization with low power endpoints in a time synchronized channel hopping network

ABSTRACT

Systems and methods are provided for maintaining a low power endpoint (LPE) synchronized on a time synchronized channel hopping network (TSCH). An LPE receives a guaranteed time slot (GTS) from a parent node. The LPE determines a wake-up time that coincides with or is prior to the GTS. The LPE enters a low power mode to conserve power until the wake-up time occurs. At that time, the LPE enters a regular power mode and may communicate with the parent node.

RELATED APPLICATION

This application claims priority to U.S. Ser. No. 61/966,648 filed Feb.26, 2014 entitled Maintaining Synchronization with a Low Power Endpointin a Time Synchronized Channel Hopping Network, which is incorporatedherein by reference.

TECHNICAL FIELD

The present invention is generally directed to maintainingsynchronization while improving battery life for a low power endpoint ina time synchronized channel hopping network.

BACKGROUND

A network may include a number of Low Power Endpoints (“LPE”s). The LPEsare generally powered by a battery and the life of the battery isdirectly related to how frequently the endpoint communicates on thenetwork. An LPE may be in communication with another node, which mayhave a more robust power source, such as utility mains. If so, then thatnode may act as a proxy and a buffer for the LPE and may help to extendthe battery life of the LPE. It would be helpful to have additionalpower management practices to further extend the battery life.

In a time synchronized channel hopping network, such as that defined byIEEE 802.14e, synchronization of the endpoints or nodes of the networkis critical to network stability and performance. When an LPE isconnected to this type of network, the LPE is typically required toengage in frequent communications in order to remain synchronized withthe network, which impacts the life of its battery.

SUMMARY

Systems and methods are disclosed for maintaining low power nodessynchronized on a time synchronized channel hopping network (TSCH). Inone exemplary method, a low power endpoint (LPE) is associated with aparent node. The parent sends information regarding a guaranteed timeslot and optionally a channel offset to the LPE.

The LPE determines a wake-up time that coincides with the nextguaranteed time slot and then enters a low power mode until the wake-uptime occurs. Once the wake-up occurs, the LPE enters a regular powermode and tunes to a channel associated with the guaranteed time slot.The LPE resynchronizes itself and then communicates as needed with theparent node. Upon completing any communication with the parent node, theLPE returns to a low power mode.

These illustrative aspects and features are mentioned not to limit ordefine the invention, but to provide examples to aid understanding ofthe inventive concepts disclosed in this application. Other aspects,advantages, and features of the present invention will become apparentafter review of the entire application.

BRIEF DESCRIPTION OF THE FIGURES

These and other features, aspects, and advantages of the presentdisclosure are better understood when the following Detailed Descriptionis read with reference to the accompanying drawings, where:

FIG. 1 is diagram of a portion of an exemplary network, including anumber of low power endpoints (“LPE”s);

FIG. 2 is a diagram illustrating exemplary time slots for a TSCHnetwork;

FIG. 3 is a diagram illustrating exemplary operation of an LPE on a TSCHnetwork;

FIG. 4 is a flowchart illustrating maintaining synchronization of an LPEon a TSCH network; and

FIG. 5 is a block diagram of an exemplary LPE.

DETAILED DESCRIPTION

Systems and methods are provided for maintaining synchronization of alow power endpoint (“LPE”) in a time synchronized channel hopping (TSCH)network that helps to minimize the power used by the LPE. In a TSCHnetwork, such as that defined by IEEE 802.14e, Medium Access Control(“MAC”) time is critical since small offsets between nodes may result innetwork instability and reduced node connectivity. Generally, nodes relyon frequent communications to maintain synchronization. An LPE has alimited power source, such as a battery, and the invention balances theneed for power management with the need for clock accuracy.

An exemplary mesh network 100 as shown in FIG. 1 includes multiplenodes, including parent nodes and child nodes. In FIG. 1, all of theillustrated child nodes are LPEs (121, 122, 131, 132, 133). The parentnodes 120, 130 may be powered by utility mains or other “robust” powersource, whereas the LPEs may be powered by batteries or other limitedpower sources. As shown in FIG. 1, LPEs 121 and 122 are associated withparent node 120 and LPEs 131, 132, and 133 are associated with parentnode 130. Although not shown in FIG. 1, the network may also includeadditional nodes that are associated with one or both of the parentnodes that operate differently than the LPEs and the parent nodes may beconnected to each other or to other nodes (not shown) either directly orthrough intervening nodes. The association between nodes, such as theassociation between an LPE and its parent node, may be established in avariety of ways and may change over time.

A TSCH network uses a series of time slots and multiple channelfrequencies for communication between nodes. Multiple time slots may begrouped into a slot frame and multiple slot frames may be grouped into asuper frame. Each time slot has a time slot duration of “T” which can bedefined in milliseconds or other appropriate time unit. FIG. 2illustrates time slots 211-226, each with the same time slot duration230. Each slot frame 210 and 220 includes seven time slots. FIG. 2 alsoillustrates a hopping pattern 240 a. A hopping pattern defines a channelfrequency or channel for each time slot in the hopping pattern. Forexample, the hopping pattern 240 a may be channel 4, channel 6, channel3, channel 5, channel 7, i.e., it may associate channel 4 with time slot1, channel 6 with time slot 2, channel 3 with time slot 3, channel 5with time slot 4, and channel 7 with time slot 5. In FIG. 2 the hoppingpattern 240 a has a hopping pattern length of 5. The hopping patternrepeats. The first illustrated iteration of the hopping pattern 240 acontains time slots 1-5 (211-215), the second iteration of the hoppingpattern 240 b contains time slots 6-10 (216-220), and the thirditeration of the hopping pattern 240 c contains time slots 11-15(221-225). The number of time slots in a hopping pattern is independentof the number of time slots in a slot frame.

A parent node assigns a link to an LPE for a guaranteed time slot(“GTS”) which is an assigned time slot for communication between theparent node and the LPE. In one implementation, the link includes a slotnumber from the slot frame and a channel offset. A GTS may be defined asa particular time slot within a slot frame, a super frame, or any otherdefined series of time slots. If a parent node is associated withmultiple LPEs such as in FIG. 1, the parent node may assign a differentguaranteed time slot to each LPE. For example, parent node 120 mayassign a first GTS to LPE 121 and a second GTS to LPE 122. In someimplementations, the parent node may also specify a channel offset inaddition to the GTS. The channel offset indicates that communicationwill occur on a different channel than the channel indicated by thehopping pattern. For example, if the channel offset is 2 and the hoppingpattern indicates that channel 3 is assigned to the GTS, then the parentnode and the LPE communicate on channel 5, which is the sum of thechannel number associated with the GTS and the channel offset (channel3+2).

Because the LPE is assigned a GTS, the LPE can determine when it needsto be able to transmit or receive communications with its parent node.At other times, the LPE may enter a low power mode or go to sleep. Inlow power mode, the LPE maintains a clock so that it can determine whento wake up and enter regular power mode. Once the LPE determines that itis time to wake up, it reverts to regular power mode.

Communication between the parent node and the LPE is initiated duringthe GTS and may conclude during the GTS or may extend beyond the GTS. Inone implementation, the LPE only transmits in response to acommunication from the parent node. This allows the LPE to minimize itstransmissions and conserve power. If the LPE does not receive acommunication from the parent node that requires a response, then theLPE returns to a low power mode or goes to sleep without transmittingany messages.

In some implementations, the LPE wakes up at a time that approximatesthe start of the GTS, whereas in other implementations, the LPE wakes upearlier. For example, the LPE may wake up at a time that is one or moretime slot durations prior to the start of the GTS. Waking up earlierallows the LPE additional time to resynchronize.

An LPE may include two clock devices, a low power mode clock and aregular power mode clock. If so, then the LPE may turn off or otherwisedisable operation of its regular power mode clock while sleeping toconserve power. An LPE may use a temperature controlled oscillator(“TCXO”) or other suitable device as its regular power mode clock tomeet the strict timing requirements of a TSCH network. Since a moreaccurate device, such as a TCXO, typically uses more power than a lessaccurate device, the LPE may turn off its regular power mode clock whilesleeping. When the LPE wakes up, it turns on its regular power modeclock so that once the LPE receives an initiation communication from theparent node, it can synchronize itself. In one implementation, theinitiation communication includes a unique ID that identifies themessage as an initiation communication. The initiation communication mayalso include timing information that the LPE needs to communicate withthe parent node.

FIG. 3 illustrates the operation of an exemplary LPE at 320 which may beany of LPEs 121, 122, 131, 132, or 133 of FIG. 1. The operation of theparent node is illustrated at 300. The parent node previously assignedthe time slot marked with an asterisk (*) to the LPE as its GTS. In FIG.3, the GTS is time slot 7, 307. The LPE uses the GTS assignment linkpreviously received from the parent node to determine a wake-up time anda channel. If the parent node also provided a channel offset, then theLPE also uses that information to determine the channel. The wake-uptime may be a time prior to the start of the GTS to accommodate any timedrift that the LPE may have accumulated. In FIG. 3, the LPE is sleepingat 321 and then wakes up at 322, which is approximately four time slotsbefore the GTS. If each time slot is approximately 25 ms, then in thisexample the LPE wakes up approximately 100 ms before the start of theGTS. Although FIG. 3 illustrates that the LPE wakes up four time slotsprior to the GTS, the number of time slots or time may vary for otherimplementations. For example, the LPE may wake up closer to the timewhen the GTS begins. In addition, the LPE may wake up at a time otherthan the start of a time slot. Once the LPE wakes up, it synchronizesitself to the parent node so that the LPE and the parent node maycommunicate. The parent node may send an initiation communication (notshown) to the LPE and the LPE may use the initiation communication forsynchronization. FIG. 3 illustrates that the nodes use four time slotsfor communication 323-326. Once the communication is completed, the LPEgoes back to sleep at 327. In situations where the LPE only transmits inresponse to a communication from the parent node, it is possible thatthe LPE wakes up, listens, and then returns to sleep withouttransmitting anything.

FIG. 4 illustrates a process 400 for maintaining synchronization betweennodes while conserving power in a TSCH network. At block 410, the LPEreceives or is provided a GTS, which optionally includes a channeloffset. At block 420, the LPE determines a wake-up time. The wake-uptime may correspond to a time at or near the start of the GTS or maycorrespond to a time that is one or more time slots prior to the startof the GTS. The wake-up time for a particular system may be based, atleast in part, on the accuracy of the LPE hardware, e.g., the oscillatorand/or crystal, and the length of time between synchronizationcommunications from the parent node.

At block 430, the LPE enters a low power mode. In some implementations,the LPE turns off its regular power mode clock when it enters low powermode. The process proceeds to block 440 and remains there by followingthe No branch until it is time for the LPE to wake up. When the LPEdetermines that it is time to wake up, the process follows the Yesbranch and proceeds to block 450 where the LPE enters regular powermode. If the regular power mode clock was turned off at block 430, thenthe regular power mode clock is turned on at block 450. At block 460,the LPE receives an initiation communication from the parent node andresynchronizes itself. At block 470, the LPE listens for a communicationand/or communicates with the parent node. Once any communication iscompleted, the LPE returns to low power mode at block 430.

Although FIG. 4 illustrates that the process proceeds from block 470 toblock 430, other implementations may proceed differently. For example,the process could proceed from block 460 or 470 to block 410 or 420. Theprocess may proceed to block 410, if the parent node reassigns the GTSfor the LPE. The process may proceed to block 420 if the LPE needs todetermine a wake up time for the next GTS. If the LPE does not receivethe initiation communication or cannot communicate with the parent node,then the process may timeout and proceed to block 410 or 420.

Next, FIG. 5 is a block diagram depicting an example of a LPE used forimplementing the techniques disclosed herein within a wireless TSCHnetwork. Endpoint node 121 may be any of the LPEs 122, 131, 132, 133shown in FIG. 1. The LPE 121 may include a processing device 502.Non-limiting examples of the processing device 502 include amicroprocessor, an application-specific integrated circuit (“ASIC”), astate machine, or other suitable processing device. Processing device502 can be communicatively coupled to computer-readable media, such asmemory device 504. The processing device 502 can executecomputer-executable program instructions and/or access informationrespectively stored in the memory device 504.

The memory device 504 can store instructions that, when executed by theprocessing device 502, cause the processing device 502 to performoperations described herein. The memory device 504 may be acomputer-readable medium such as (but not limited to) an electronic,optical, magnetic, or other storage device capable of providing aprocessor with computer-readable instructions. Non-limiting examples ofsuch optical, magnetic, or other storage devices include read-only(“ROM”) device(s), random-access memory (“RAM”) device(s), magneticdisk(s), magnetic tape(s) or other magnetic storage, memory chip(s), anASIC, configured processor(s), optical storage device(s), or any othermedium from which a computer processor can read instructions. Theinstructions may comprise processor-specific instructions generated by acompiler and/or an interpreter from code written in any suitablecomputer-programming language. Non-limiting examples of suitablecomputer-programming languages include C, C++, C#, Visual Basic, Java,Python, Perl, JavaScript, and the like.

FIG. 5 illustrates two clocks, a first clock used for regular power mode505 and a second clock 507 used for both regular and low power modes.Other implementations may use a different number of clocks.

LPE 121 can include a bus 506 that can communicatively couple one ormore components of the LPE 121. Although the processor 502, the memory504, and the bus 506 are depicted in FIG. 5 as separate components incommunication with one another, other implementations are possible. Forexample, the processor 502, the memory 504, and the bus 506 can becomponents of printed circuit boards or other suitable devices that canbe disposed in LPE 121 to store and execute programming code.

LPE 121 can also include network interface device 508. The networkinterface device 508 can be a transceiving device configured toestablish wireless communication links via an antenna 510. Anon-limiting example of the network interface device 508 is an RFtransceiver and can include one or more components for establishing acommunication link to other nodes in the network 100.

General Considerations

These examples given are only for illustrative purposes and not meant tolimit the invention to these devices. While the present subject matterhas been described in detail with respect to specific aspects thereof,it will be appreciated that those skilled in the art, upon attaining anunderstanding of the foregoing, may readily produce alterations to,variations of, and equivalents to such aspects. Accordingly, it shouldbe understood that the present disclosure has been presented forpurposes of example rather than limitation and does not precludeinclusion of such modifications, variations, and/or additions to thepresent subject matter as would be readily apparent to one of ordinaryskill in the art. In particular, aspects of the invention may be used innodes other than those that use a battery or other limited power source,the parent node may specify a time slot for communication with an LPE inways other than those described herein, and the nodes may not be relatedas parent-child nodes.

What is claimed is:
 1. A method performed by a first node on a network,comprising: receiving information regarding a guaranteed time slot forcommunication with a second node on the network, wherein the informationincludes a time slot assignment for the guaranteed time slot, andwherein the network is a time synchronized channel hopping network;determining a wake-up time based on the time slot assignment for theguaranteed time slot; entering a low power mode; remaining in the lowpower mode for a plurality of time slots; when the wake-up time occurs,entering a regular power mode; determining a channel associated with theguaranteed time slot based on the time slot assignment for theguaranteed time slot and a hopping pattern, wherein the hopping patterndefines a repeating sequence of frequencies, and each time slot isassociated with one of the frequencies from the hopping pattern; tuningto the channel associated with the guaranteed time slot; receiving amessage from the second node via the channel during the guaranteed timeslot, wherein the message includes an identifier that identifies themessage as an initiation communication; in response to receiving theinitiation communication, using information provided by the initiationcommunication to synchronize with the second node; transmitting acommunication from the first node to the second node on the channel; andreturning to the low power mode.
 2. The method as in claim 1, whereinthe information regarding the guaranteed time slot includes a channeloffset and wherein tuning to a channel associated with the guaranteedtime slot comprises tuning to a channel having a channel number thatcorresponds to a sum of a channel number that corresponds to theguaranteed time slot and the channel offset.
 3. The method as in claim1, further comprising: wherein transmitting a communication from thefirst node to the second node on the channel is performed in response toreceiving a communication from the second node requesting acommunication from the first node.
 4. The method as in claim 1, whereinentering a low power mode comprises disabling operation of a clockdevice, and wherein entering a regular power mode comprises enablingoperation of the clock device.
 5. The method as in claim 4, whereinusing information provided by the initiation communication tosynchronize with the second node comprises synchronizing the clockdevice.
 6. The method as in claim 1, wherein determining a wake-up timecomprises determining a wake-up time that corresponds to a start of theguaranteed time slot.
 7. The method as in claim 1, wherein the wake-uptime occurs at least one time slot duration prior to a start of theguaranteed time slot.
 8. The method as in claim 1, wherein theguaranteed time slot is defined by Institute of Electrical andElectronics Engineers (IEEE) 802.15.4e-2012.
 9. A first node,comprising: a processor; a network interface for communicating on anetwork; a regular power mode clock device; a low power mode clockdevice; and a memory configured to store instructions that when executedby the processor cause the first node to: receive information regardinga guaranteed time slot from a second node on the network via the networkinterface, wherein the information includes a time slot assignment forthe guaranteed time slot, and wherein the network is a time synchronizedchannel hopping network; determine a wake-up time based on the time slotassignment for the guaranteed time slot; enter a low power mode,including disabling operation of the regular power mode clock; remain inthe low power mode for a plurality of time slots; use the low power modeclock to determine when the wake-up time occurs; when the wake-up timeoccurs, enable operation of the regular power mode clock, enter aregular power mode, and tune to a channel associated with the guaranteedtime slot, wherein the channel associated with the guaranteed time slotis based on the time slot assignment for the guaranteed time slot and ahopping pattern, wherein the hopping pattern defines a repeatingsequence of frequencies, and each time slot is associated with one ofthe frequencies from the hopping pattern; receive a message from thesecond node via the network interface and the channel during theguaranteed time slot, wherein the message includes an identifier thatidentifies the message as an initiation communication; and in responseto receiving the initiation communication, use information provided bythe initiation communication to synchronize with the second node;transmit a communication from the first node to the second node on thechannel; and return to the low power mode.
 10. The first node as inclaim 9, wherein the regular power mode clock device is more accuratethan the low power mode clock device.
 11. The first node as in claim 9,wherein the regular power mode clock device is a temperature controlledoscillator.
 12. The first node as in claim 9, wherein the memory isfurther configured to store instructions that when executed by theprocessor cause the first node to: transmit a communication from thefirst node to the second node on the channel occurs in response to thefirst node receiving a communication from the second node requesting acommunication from the first node via the network interface.
 13. Thefirst node as in claim 9, wherein the wake-up time corresponds to astart of the guaranteed time slot.
 14. The first node as in claim 9,wherein the wake-up time corresponds to a time that is at least one timeslot duration prior to a start of the guaranteed time slot.
 15. Thefirst node as in claim 9, further comprising a limited power source forpowering the first node.
 16. The first node as in claim 15, wherein thelimited power source is a battery.
 17. A method performed by a firstnode on a time synchronized channel hopping network, comprising:receiving information regarding a guaranteed time slot for communicationwith a second node on the network, wherein the information includes atime slot assignment for the guaranteed time slot; determining a wake-uptime based on the time slot assignment for the guaranteed time slot,wherein the wake-up time corresponds to a time that is at least one timeslot duration prior to the guaranteed time slot; entering a low powermode; remaining in low power mode for a plurality of time slots; whenthe wake-up time occurs, entering a regular power mode; determining achannel associated with the guaranteed time slot based on the time slotassignment for the guaranteed time slot and a hopping pattern, whereinthe hopping pattern defines a repeating sequence of frequencies, andeach time slot is associated with one of the frequencies from thehopping pattern; tuning to the channel associated with the guaranteedtime slot; receiving a message from the second node via the channelduring the guaranteed time slot, wherein the message includes anidentifier that identifies it as an initiation communication; inresponse to receiving the initiation communication, using informationprovided by the initiation communication to synchronize with the secondnode; communicating with the second node during the guaranteed time slotvia the channel; and returning to the low power mode.
 18. The method asin claim 17, wherein entering a low power mode comprises disablingoperation of a clock device, and wherein entering a regular power modecomprises enabling operation of the clock device.
 19. The method as inclaim 17, wherein tuning to a channel comprises tuning to a channelhaving a channel number that corresponds to a sum of a channel numberthat corresponds to the guaranteed time slot and a channel offset. 20.The method as in claim 19, wherein the channel offset is received fromthe second node.